M. Hayashikoshi, “Embedded memory solutions for AI, ML and IoT,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2019
M. Hayashikoshi, J. Suzuki, Y. Watanabe, A. Furuya, T. Yabuta, M. Ido, Y. Kiyota and T. Kono, “Processing In-Memory Architecture with On-Chip Transfer Learning Function for Compensating Characteristic Variation,” IEEE International Memory Workshop (IMW), May 2020
M. Hayashikoshi, H. Ueki, H. Kawai, T. Shimizu, K. Nii, and Y. Matsuda, “Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications,” IEEE Transaction on Multi-Scale Computing Systems, Vol.4, No.4, pp.784-792, Oct. 2018
M. Hayashikoshi, H. Tanizaki, Y. Murai, T. Tsuji, K. Kawabata, K. Nii, H. Noda, H. Kondo, Y. Matsuda and H. Hidaka, “A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications,” IEICE TRANSACTIONS on Electronics, Vol.E102-C, No.4, pp.287-295, Apr. 2019
H. Nakamura, T. Nakada, M. Hayashikoshi, et al., “Normally-Off Computing,” Springer Japan, Feb. 2017 (共著)